Dear students,

Our department intends to open an intensive short-term course.

The course description is as follows:

Course Code & Name: ET5921701電子工程專論(一)

Special Topics on Electronic Engineering (I)

Topic: Electrostatic Discharge (ESD) Protection in CMOS Technologies: Principles, Modelling and Design

Instructor: Dr. Juin J. Liou

Pegasus Distinguished Professor and Lockheed Martin St. Laurent Professor, University of Central Florida, USA / Chang Jiang Scholar Endowed Professor, Ministry of Education, China / Honorary Endowed Professor, National Taiwan University of Science and Technology / Fellow of IEEE, Fellow of IET, Fellow of ADI

Class dates & Class hours:  12th Sept. 2018 (Wed.)~ 14th Sept. 2018 (Fri.) and 17th Sept. 2018 (Mon.)

18:25- 21:05(第A,B,C節) (Every day)

15th Sept. 2018 (Sat.)  

09:10-12:10 &13:20-16:40 (第2,3,4節&第6,7,8節) (One day)

Total time : 18 hours

Credit: 1

Course language: English

Class Room: TBD

Abstract:

Electrostatic discharge (ESD) is one of the most prevalent threats to the reliability of electronic components. It is an event in which a finite amount of charge is transferred from one object (i.e., human body) to the other (i.e., microchip). This process can result in a very high current passing through the microchip within a very short period of time, and more than 35% of chip damages can be attributed to such an event.  As such, designing robust on-chip ESD structures to protect microchips against ESD stress is a high priority in the semiconductor industry. The continuing scaling of CMOS technology makes the ESD-induced failures even more prominent, and one can predict with certainty that the availability of effective and robust ESD protection solutions will be a critical factor to the success of the deep sub-micron technology advancement. In fact, many semiconductor companies worldwide are having difficulties in meeting the increasingly stringent ESD protection requirements for various electronics applications.

There has been a wide spread use of electronic components in high-voltage applications, such as automotive integrated circuits which are typically operated in a voltage range of 40-60 V. This relatively high-voltage operation imposes certain challenges to the design of high-voltage ESD protection solutions. On the other hand, due to the huge market of civil wireless communications, low-voltage integrated circuits are also in high demand. Design of effective ESD protection for these circuits typically requires a very narrow ESD operation window and minimal loading effect (i.e., high transparency), hence introducing a different set of challenges.

This short course gives a comprehensive coverage on various important issues pertinent to ESD protection solutions, including ESD fundamental, modelling, and design of high- and low-voltage IC’s in BCD/CMOS technologies. 

Outline:

1. Fundamentals of semiconductor devices
2. Overview of ESD (charge generation, damaging mechanisms, ESD standards, ESD protection schemes)
3. Issues of ESD testing and measurements (testing equipment, transmission line pulsing (TLP) technique)
4. ESD protection modelling (model development of MOSFET and SCR for ESD applications)
5. ESD protection design (practical ESD designs based on diode and SCR)
6. ESD optimization for RF functionality integrity (optimization of ESD protection structure to minimize parasitic capacitance for RF applications)
7.